1. Field of the Invention
The present invention generally relates to a technique for testing a symmetric circuit, and more particularly, to a technique for preventing transistor characteristic changes caused by circuit testing from affecting the substantial circuit characteristic.
2. Description of Related Art
After a reliability test is performed on an operation amplifier having a symmetric circuit structure, devices in the operation amplifier may have different attenuations due to different electrical characteristics or layout surroundings of these devices. As a result, the operation amplifier may produce a wrong result, such as a mismatch problem.
FIG. 1 is a diagram of an amplifier circuit in a conventional operation amplifier. FIG. 1(a) illustrates a symmetric circuit 100, and FIG. 1(b) illustrates the operation of the operation amplifier. Referring to FIG. 1(a), the symmetric circuit 100 includes four symmetrically disposed MOS transistors M1˜M4. One end of a current source 102 is connected between the transistors M1 and M2, and the other end thereof is connected to a ground voltage. The gate of the transistor M1 is connected to an input terminal VI, and the gate of the transistor M2 is connected to an output terminal VO. The transistors M1 and M2 form a pair of transistors. Besides, the transistors M3 and M4 also form a pair of transistors. However, the transistor M1 is connected with the transistor M3 in series to form a part of the circuit, and the transistor M2 is connected with the transistor M4 in series to form another part of the circuit. The transistors M1 and M3 are substantially symmetrical to the transistors M2 and M4 except the slightly different connection control of the gates thereof. Referring to FIG. 1(b), the operation amplifier actually plays its part when resistors R1 and R2 are externally connected to the operation amplifier.
The attenuations of the transistors M1 and M3 and the transistors M2 and M4 may be different after a reliability test is performed on the conventional operation amplifier due to different transient electrical characteristics of the input signal VI and the output signal VO. Thus, attenuation mismatch may be produced between the transistors M1 and M2 and between the transistors M3 and M4. Accordingly, the characteristic of the operation amplifier may be changed after the reliability test is performed thereon.
FIG. 2 illustrates the waveforms of the input signal VI and the output signal VO. Referring to FIG. 2, the input signal. VI may be an ideal square wave, and the rising edge and falling edge thereof are steep (almost vertical). The rising edge and falling edge of the output signal VO are delayed (for an ideal fixed value) according to the characteristics of the transistors. However, the amplification of the operation amplifier may be changed if attenuation mismatch between the transistors is produced after a reliability test of the same electrical characteristic is performed.
In other words, the problem of attenuation mismatch is produced due to different electrical characteristics and layout surroundings of symmetric devices in an operation amplifier when a reliability test is performed on the operation amplifier.